1. Field of the Invention
The present invention relates to a semiconductor device driving a bridge-connected power device in a push-pull manner.
2. Description of the Background Art
A power device of an IGBT (Insulated-Gate Bipolar Transistor) that handles large power is widely used in applications of driving a power motor and the like. A power device (power transistor) is often used in the form of a half-bridge circuit having two power devices driving a load alternately, or an H bridge circuit having four power transistors driving a load alternately.
Such power devices are required to switch more current at high speed. Problems occurring by the parasitic inductance of a bridge circuit in switching high-amperage current at high speed and a method for improving such problem are disclosed in Non-Patent Document 1 (“Solving the Problem of Noise When Driving at High Power and High Frequency by Power IC” by L. Kiraly in International Rectified DESIGN TIPS, DT92-1J, http://www.irf-japan.com/technical-info/designtp/dt92-1j.pdf) and Non-Patent Document 2 (“Precaution During Transition of Power Stage Driven by Control IC” by C. Chey et al. in International Rectified DESIGN TIPS, DT97-3J, http://www.irf-japan.com/technical-info/designtp/dt97-3j.pdf). According to Non-Patent Documents 1 and 2, a diode is connected in the reverse direction between a reference potential node (virtual ground potential node), which is coupled to the connection node of a high-side power transistor and a low-side power transistor (the “high-side” and “low-side” will also imply “high potential side” and “low potential side” in the present specification), and a ground node (common ground node). In other words, the diode has a cathode connected to a virtual ground terminal (VS terminal) and an anode connected to a common ground terminal (GND) outside the high-voltage control IC.
Non-Patent Documents 1 and 2 teach a configuration to solve the problem when there is a parasitic inductance component caused by the interconnections and pads. In a bridge configuration, when the load is an inductive load, a spike-like noise is generated by the current flowing through the free-wheel diode of the low-side power transistor when the high-side power transistor is turned off. The potential at the virtual ground node (VS) becomes lower than the ground potential (GND) due to delay in the turn-on of the free-wheel diode and the forward voltage drop, as well as by the parasitic inductance component at the interconnection. A bootstrap power supply node supplying the power supply voltage to the circuit that drives the high-side power transistor is coupled to the virtual ground node via a decouple capacitor. Furthermore, a diode (also referred to as “bootstrap diode”) is connected in the forward direction between the power supply node and the bootstrap power supply node. By the decouple capacitor, the bootstrap power supply (VB) is maintained at the floating power state in order to maintain a voltage Vbs between the bootstrap power supply node (VB) and the virtual ground node (VS) constant.
However, generation of a negative spike-like noise at the virtual ground node (VS) causes reduction in the potential at the bootstrap power supply node (VB) by the decouple capacitor. The bootstrap diode is turned on, so that the high-amperage current from the power supply node flows into the control circuit to damage the control circuit (IC). To prevent this phenomenon, a high-voltage diode of high speed is connected between the virtual ground node (VS) and common ground node (COM) to clamp the lowest potential of the virtual ground node at the ground voltage level. By this clamping operation, the potential of bootstrap power supply (VB) is maintained at the level equal to or higher than the ground voltage to prevent the bootstrap diode from being biased in the forward direction by the spike noise when the high-side power transistor is turned off. Thus, a flow of high-amperage current from the power supply node to eventually damage the control circuit (IC) is prevented.
A configuration directed to preventing the parasitic diode between the bootstrap power supply and common ground in the driving device from being damaged by a noise of the virtual ground potential (VS undershooting) is disclosed in Japanese Patent Laying-Open No. 2005-160177. This publication teaches that a load circuit is connected between the virtual ground node (VS) and common ground node (COM). A series circuit of a diode and thermistor is connected parallel to this load circuit. A diode of a low forward voltage drop, having a forward turn-on time shorter than that of a free-wheel diode, is employed. The diode has its cathode connected to the virtual ground node and its anode connected to the thermistor. The thermistor has a positive temperature characteristic. Further, a capacitor is connected parallel to the load circuit.
This capacitor connected parallel to the load circuit is employed in view of switching loss and noise reduction. When the high-side power transistor is turned OFF, current flows through the series circuit of the diode and thermistor before the free-wheel diode is rendered conductive. Accordingly, subsequent flow of the load current to the capacitor is prevented, suppressing the occurrence of undershooting at the virtual ground node (VS).
Similarly, a configuration directed to suppressing negative spike-like noise (VS undershooting) at the virtual ground node is also disclosed in Japanese Patent Laying-Open No. 2005-160268. This publication teaches that, in order to suppress generation of a virtual ground node regenerative voltage when the high-side power transistor is turned off, a diode is connected in the reverse direction between the virtual ground node and common ground node, and a parallel circuit of a resistor and capacitor with respect to the virtual ground node is connected in series with the diode.
The system in this publication aims to prevent, when turning off the high-side power transistor, generation of a large negative potential at the virtual ground node by turning on the free-wheel diode connected to the low-side power transistor at high speed, and to avoid reduction in the surge absorption effect of the capacitor by discharging the charge in the capacitor by means of the resistor.
The high-voltage diode that clamps the virtual ground potential is arranged outside the drive IC (control circuit) disclosed in the aforementioned documents of related art. In such an arrangement, the diode is coupled to a terminal (pad) of the control circuit (IC) via an external interconnection. It is required that the parasitic inductance component at the interconnections and pads provided for the purpose of external connection with the diode is minimized. This is because the noise caused by the inductance component during variation in current is proportional to the inductance value thereof.
In the case where a diode for clamping is connected outside of the control circuit, reduction in the parasitic inductance component at the interconnection induces a critical constraint in layout, as set forth below. In view of the essential aim of a control IC (control circuit) to drive a power transistor efficiently, the power transistors are preferentially arranged in the proximity of the control IC. Therefore, the high-voltage diode for clamping directed to protecting the control IC (limiting VS undershooting) will be arranged relatively far away from the control IC. The length of the interconnection for the clamping diode becomes longer, which in turn essentially increases the parasitic inductance component. Thus, the possibility of increase in the negative undershooting (VS undershooting) of the virtual ground potential becomes higher.
In order to suppress the effect of the parasitic inductance component at the interconnection for the clamping diode, an approach of inserting an inductance component between the virtual ground potential node of the control IC and the connection node of the power transistors may be considered. However, the high-voltage control IC and power transistors are preferably arranged close to each other, as set forth above. Furthermore, the aforementioned additional inductance component will act as a large resistance component when operating at high frequency during the drive of the power transistor to become the cause of impeding a high-speed switching operation. It is therefore not preferable to connect an additional inductance component between the virtual ground node and the connection node (intermediate node) of power transistors.
Although connecting a diode outside the control IC in order to reduce undershooting at the virtual ground potential node (VS undershooting) is one effective measure, there are many problems to be overcome.